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Volumn 34, Issue 1-4, 2001, Pages 155-164
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Disturb free programming scheme for single transistor ferroelectric memory arrays
a a a a |
Author keywords
FEMFET; Ferroelectric; Field effect transistor; Memory array; Programming scheme; Read write disturb
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Indexed keywords
COMPUTER SIMULATION;
ELECTRIC POTENTIAL;
FERROELECTRIC DEVICES;
GATES (TRANSISTOR);
LOGIC CIRCUITS;
POLARIZATION;
SUBSTRATES;
SYSTOLIC ARRAYS;
DISTURB FREE PROGRAMMING SCHEME;
FERROELECTRIC MEMORY FIELD EFFECT TRANSISTOR;
SINGLE TRANSISTOR FERROELECTRIC MEMORY ARRAYS;
FIELD EFFECT TRANSISTORS;
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EID: 0035034424
PISSN: 10584587
EISSN: None
Source Type: Journal
DOI: 10.1080/10584580108012885 Document Type: Conference Paper |
Times cited : (13)
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References (9)
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