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Volumn 34, Issue 1-4, 2001, Pages 155-164

Disturb free programming scheme for single transistor ferroelectric memory arrays

Author keywords

FEMFET; Ferroelectric; Field effect transistor; Memory array; Programming scheme; Read write disturb

Indexed keywords

COMPUTER SIMULATION; ELECTRIC POTENTIAL; FERROELECTRIC DEVICES; GATES (TRANSISTOR); LOGIC CIRCUITS; POLARIZATION; SUBSTRATES; SYSTOLIC ARRAYS;

EID: 0035034424     PISSN: 10584587     EISSN: None     Source Type: Journal    
DOI: 10.1080/10584580108012885     Document Type: Conference Paper
Times cited : (13)

References (9)


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.