A statistical methodology for the design of high-performance current steering DAC's

ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings

Volumn 5, Issue , 2001, Pages 311-314

  Crippa, Paolo ^a   Conti, Massimo ^a   Turchetti, Claudio ^a  

^a UNIVERSITÀ POLITECNICA DELLE MARCHE   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

DRAIN CURRENT; RANDOM PROCESSES; STATISTICAL METHODS; STOCHASTIC SYSTEMS; CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; ELECTRIC CURRENTS; MATHEMATICAL MODELS; PERFORMANCE;

AUTOCORRELATION FUNCTIONS; CURRENT STEERING DAC; DEVICE VARIATIONS; NOVEL DESIGN METHODOLOGY; STATIC PERFORMANCE; STATISTICAL METHODOLOGIES; STATISTICAL MODELING; STATISTICAL SIMULATION;

DESIGN; ANALOG TO DIGITAL CONVERSION;

DRAIN CURRENT; RANDOM DEVICE VARIATIONS;

EID: 0035006186     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/iscas.2001.922047     Document Type: Conference Paper

References (3)

1. C. A. A. Bastiaansen, D. W. J. Groeneveld, H. J. Schouwe-naars, and H. A. H. Termer, "A 10-b 40 MHz 0.8-pm CMOS current-output D/A converter, " IEEE J. Solid-State Circuits, vol. 26, n. 7, pp. 917-921, July 1991.
2. Y. Nakamura, T. Miki, A. Maeda, H. Kondoh, and N. Yazava, "A 10-b 70-MS/s CMOS D/A converter, " IEEE J. Solid-State Circuits, vol. 26, n. 4, pp. 637-642, April 1991.
3. G. A. M. Van der Plas, J. Vandenbussche, W. Sansen, M. S. J. Steyaert, and G. G. E. Gielen "A 14-bit intrinsic accuracy Q2 random walk CMOS DAC, " IEEE J. Solid-State Circuits, vol. 34, n. 12, pp. 1708-1718, Dec. 1999.