A novel structure for portable digitally controlled oscillator

ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings

Volumn 1, Issue , 2001, Pages 272-275

  Jong, Jin Jer ^a   Lee, Chen Yi ^a  

^a NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

C PROGRAMS; CMOS PROCESSS; DIGITALLY CONTROLLED OSCILLATORS; HSPICE SIMULATOR; NOVEL STRUCTURES; STANDARD CELL; TARGET FREQUENCIES;

CMOS INTEGRATED CIRCUITS; OSCILLATORS (ELECTRONIC);

BANDWIDTH; CMOS INTEGRATED CIRCUITS; COMPUTER ARCHITECTURE; COMPUTER PROGRAM LISTINGS; COMPUTER SIMULATION; PHASE LOCKED LOOPS; VOLTAGE CONTROL;

DIGITALLY CONTROLLED OSCILLATORS (DCO);

EID: 0035005418     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2001.921845     Document Type: Conference Paper

References (5)

1. D. H. Wolaver, Phase-Locked Loop Circuit Design. Englewood Cliffs, NJ: Prentice-Hall, 1991.
2. Terng-Yin Hsu, Bai-Jue Shieh, and Chen-Yi Lee, "An All-Digital Phase-Locked Loop (ADPLL)-Based Clock Recovery Circuit", IEEE J. Solid-State Circuits, Vol. 34, NO. 8, Aug. 1999.
3. Jim Dunning, Gerald Garcia, Jim Lundberg, and Ed Nuckolls, "An All-Digital Phase-Locked Loop with 50-Cycle Lock Time Suitable for High Performance Microprocessors", IEEE J. Solid-State Circuits, Vol. 30, NO. 4, pp. 412-422, Apr. 1995.
4. Jen-Shiun Chiang and Kuang-Yuan Chen, "A 3.3V ALL DIGITAL PHASE-LOCKED LOOP WITH SMALL DCO HARDWARE AND FAST PHASE LOCK", ISCAS'98, Vol. 3, pp. 554-557, 1998.
5. Azman M. Yusof, Lim Chu Aun, and S. M. Rezaul Hasan, "600MHz Digitally Controlled BiCMOS Oscillator (DCO) for VLSI Signal Process and Communication Applications", Proceedings of the 8th Great Lakes Symposium, pp. 71-76, Feb. 1998.