Advanced 2D latch-up device simulation-a powerful tool during development in the pre-silicon phase

Annual Proceedings - Reliability Physics (Symposium)

Volumn , Issue , 2001, Pages 235-239

  Bargstadt Franke S ^a   Oettinger, K ^a  

^a INFINEON TECHNOLOGIES AG   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; CURRENT VOLTAGE CHARACTERISTICS; ELECTRIC CURRENT MEASUREMENT; OPTIMIZATION; SEMICONDUCTING SILICON; SEMICONDUCTOR DEVICE STRUCTURES; SUBSTRATES; VOLTAGE MEASUREMENT;

LATCH-UP DEVICE SIMULATION; PRE-SILICON PHASE;

INTEGRATED CIRCUIT TESTING;

EID: 0034994976     PISSN: 00999512     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)

1. TCAD-a progressive tool for engineers
2. The use of simulation in semiconductor technology development
3. Analysis of external latch-up protection test structure design using numerical simulation
4. Latchup in CMOS technology, the problem and its cure