Mixed mode double-gate FET model

Annual Device Research Conference Digest

Volumn , Issue , 2001, Pages 77-78

  Solomon, P M ^a  

^a IBM T J WATSON RESEARCH CENTER   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; CAPACITANCE; CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; ELECTRIC FIELD EFFECTS; ELECTRIC INVERTERS; THRESHOLD VOLTAGE;

DOUBLE-GATE FIELD EFFECT TRANSISTORS (DGFET);

GATES (TRANSISTOR);

EID: 0034873617     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)

1. Scaling theory for double-gate SOI MOSFET's