Power-aware modulo scheduling for high-performance VLIW processors

Proceedings of the International Symposium on Low Power Electronics and Design, Digest of Technical Papers

Volumn , Issue , 2001, Pages 40-45

  Yun, H S ^a   Kim, J ^a  

^a Seoul National University   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; ENERGY DISSIPATION; ENERGY EFFICIENCY; MICROPROCESSOR CHIPS; OPTIMIZATION; PROGRAM COMPILERS; PROGRAM PROCESSORS; SPURIOUS SIGNAL NOISE;

INDUCTIVE NOISE; OPTIMIZING COMPILERS;

VERY LONG INSTRUCTION WORD ARCHITECTURE;

EID: 0034871149     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/383082.383091     Document Type: Conference Paper

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