SCOPUS 정보 검색 플랫폼

Conference Proceedings - Annual International Symposium on Computer Architecture, ISCA

Volumn , Issue , 2001, Pages 166-177

Exploring and exploiting wire-level pipelining in emerging technologies

(2) Niemier, M T a Kogge, P M a

a University of Notre Dame (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMBINATORIAL CIRCUITS; COMPUTER ARCHITECTURE; DATA FLOW ANALYSIS; FINITE AUTOMATA; FLIP FLOP CIRCUITS; LOGIC CIRCUITS; LOGIC DESIGN; LOGIC GATES; NANOTECHNOLOGY; SEMICONDUCTOR QUANTUM DOTS;

QUANTUM CELLULAR AUTOMATA; STATE MACHINES; WIRE-LEVEL PIPELINING;

PIPELINE PROCESSING SYSTEMS;

EID: 0034839133 PISSN: 08847495 EISSN: None Source Type: Conference Proceeding
DOI: 10.1145/379240.379261 Document Type: Conference Paper

Times cited : (52)

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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.