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Volumn 80-81, Issue , 2001, Pages 379-384

Simulation of the backward current in polycrystalline silicon thin-film transistors

Author keywords

Modelling; Polysilicon; TFT

Indexed keywords

CHEMICAL VAPOR DEPOSITION; COMPUTER SIMULATION; CURRENT VOLTAGE CHARACTERISTICS; ENERGY GAP; GRAIN BOUNDARIES; GRAIN SIZE AND SHAPE; LEAKAGE CURRENTS; POLYSILICON;

EID: 0034837722     PISSN: 10120394     EISSN: None     Source Type: Book Series    
DOI: 10.4028/www.scientific.net/ssp.80-81.379     Document Type: Conference Paper
Times cited : (1)

References (10)
  • 6
    • 84902964259 scopus 로고    scopus 로고
    • Virtual Wafer Fab, Society Silvaco international, Santa Clara
    • (1998)
  • 9
    • 84902988241 scopus 로고
    • Ph.D. thesis, (Université de Paris 6, Paris)
    • (1987)
    • Chahed, L.1
  • 10
    • 84902993781 scopus 로고
    • Ph.D. thesis, (University of Stanford)
    • (1989)
    • Watt, J.T.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.