BSIM model for circuit design using advanced technologies

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn , Issue CIRCUITS SYMP., 2001, Pages 5-6

  Hu, C ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

AMPLIFICATION; CAPACITANCE; CMOS INTEGRATED CIRCUITS; ELECTRON TUNNELING; IMPACT IONIZATION; INTEGRATED CIRCUIT LAYOUT; THERMAL NOISE;

SUBSTRATE CURRENTS;

FIELD EFFECT TRANSISTORS;

EID: 0034799654     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (16)