Dynamic modeling of inter-instruction effects for execution time estimation

Proceedings of the International Symposium on System Synthesis

Volumn , Issue , 2001, Pages 136-141

  Beltrame, G ^a   Brandolese, C ^b   Fornaciari, W ^b   Salice, F ^b   Sciuto, D ^b   Trianni, V ^b  

^a CEFRIEL   (Italy)

^b POLITECNICO DI MILANO   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SOFTWARE; EMBEDDED SYSTEMS; ENERGY UTILIZATION; ERROR ANALYSIS; MATHEMATICAL MODELS; PIPELINE PROCESSING SYSTEMS; STATISTICAL METHODS;

POWER CONSUMPTION;

MICROPROCESSOR CHIPS;

EID: 0034785301     PISSN: 10801820     EISSN: None     Source Type: Journal    
DOI: 10.1145/500001.500033     Document Type: Article

References (13)

1. An instruction-level functionality-based energy estimation model for 32-bits microprocessors
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3. High-level power modelling, estimation, and optimization
4. Instruction level power model and its application to general purpose processors
5. Software power estimation and optimization for high performance, 32-bit embedded processors
6. Power analysis of embedded software: A first step towards software power minimization
7. Power analysis of the intel 486DX2