Multi-way clustering techniques for system level partitioning

Proceedings of the Annual IEEE International ASIC Conference and Exhibit

Volumn , Issue , 2001, Pages 242-247

  Lopez Vallejo M L ^a   Lopez Lopez J C ^b  

^a UNIVERSIDAD POLITÉCNICA DE MADRID   (Spain)

^b UNIVERSITY OF CASTILLA LA MANCHA   (Spain)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTER HARDWARE; COMPUTER SOFTWARE; HEURISTIC METHODS; OPTIMIZATION; ROBUSTNESS (CONTROL SYSTEMS);

CLUSTERING; SYSTEM LEVEL PARTITIONING;

SYSTEMS ANALYSIS;

EID: 0034776297     PISSN: 10630988     EISSN: None     Source Type: Journal    
DOI: 10.1109/ASIC.2001.954705     Document Type: Article

References (10)

1. HW/SW partitioning with UNITY
2. System level hardware/software partitioning based on simulated annealing and tabu search
3. Hardware-software cosynthesis for microcontrollers
4. HW-SW cosynthesis for digital systems
5. The extended partitioning problem: Hw/Sw mapping, scheduling and implementation-bin selection
6. Constraint-driven system partitioning
7. A system-level synthesis algorithm with guaranteed solution quality
8. Hardware software partitioning with integrated hardware design space exploration
9. Modifying min-cat for hardware and software functional partitioning
10. Clustering for improved system-level functional partitioning