Chemical processing and materials compatibility of high-K dielectric materials for advanced gate stacks

Diffusion and Defect Data Pt.B: Solid State Phenomena

Volumn 76-77, Issue , 2000, Pages 19-22

  Guan, J J ^a   Gale, G W ^b   Bersuker, G ^b   Jackson, M ^b   Huff, H R ^b  

^a ADVANCED MICRO DEVICES   (United States)

^b SEMATECH   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BUILT-IN SELF TEST; ELECTRODES; GATES (TRANSISTOR); HYDROFLUORIC ACID; HYDROGEN PEROXIDE; MOSFET DEVICES; REACTIVE ION ETCHING; SEMICONDUCTOR DEVICE MANUFACTURE; SEMICONDUCTOR DOPING; SILICA; SULFURIC ACID; THIN FILMS;

CHEMICAL PROCESSING; GATE STACKS; HIGH K DIELECTRICS;

DIELECTRIC MATERIALS;

EID: 0034498420     PISSN: 10120394     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Article

References (3)

1. S. -H Lo, D. A. Buchanan, Y. Taur, W. Wang, "Quantum-mechanical modeling of electron tunneling current from the inversion layer of ultra-thin-oxide nMOSFETs," IEEE Electron Devices Lett., vol. 18, No. 5, p.206. May 1997.
2. 5 Gate Dielectric Transistors", 197 ECS Meeting, Fifth International Symposium on Low and High Dielectric Constant Materials, May 14-18, 2000, Toronto
3. Acknowledgements: The authors would like to thank L. Vishnubhotla, G. Smith, A. Karamcheti, V.H.C. Watt, T.Y. Luo, A. Agarwal, H. AlShareef, P. Lysaght, G. Williamson, B. Nguyen, G. A. Brown, P. Zeitzoff, F. Shaapur and K. Torres of the SEMATECH gate stack team for their support of the work. The authors also would like to acknowledge Tokyo Electron for its help and participation in this project.