Differential 160-MHz self-terminating adaptive CMOS line driver

IEEE Journal of Solid-State Circuits

Volumn 35, Issue 12, 2000, Pages 1889-1894

  Mahadevan, Rajeevan ^a   Johns, David A ^b  

^a Snowbush Inc   (Canada)

^b UNIVERSITY OF TORONTO   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

BANDWIDTH; COMPUTER NETWORKS; ELECTRIC POTENTIAL; TRANSCEIVERS;

ADAPTIVE CIRCUITS;

CMOS INTEGRATED CIRCUITS;

EID: 0034476559     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.890302     Document Type: Article

References (6)

1. B. Nauta and M. Dijkstra, "Analog video line driver with adaptive impedance matching," Int. Solid-State Circuits Conf., pp. 318-319, Feb. 1998.
2. D. A. Johns and D. Essig, "Integrated circuits for data transmission over twisted-pair channels," IEEE J. Solid-State Circuits, vol. 32, pp. 398-406, Mar. 1997.
3. J. Everitt et al., "A CMOS transceiver for 10-Mb/s and 100-Mb/s ethernet," IEEE J. Solid-State Circuits, vol. 33, pp. 2169-2177, Dec. 1998.
4. J. N. Babanezhad, "A 100-MHz 50 Ω-45-dB distortion 3.3-V CMOS line-driver for ethernet and fast ethernet networking applications," IEEE J. Solid-State Circuits, vol. 34, pp. 1044-1050, Aug. 1999.
5. D. A. Johns and K. Martin, Analog Integrated Circuit Design. New York: Wiley, 1997.
6. A. Shoval, "Median-Based Offset Cancellation Circuits for Integrated Analog Filters," M.A.Sc. thesis, Univ. Toronto, 1991.