Estimation method of the channel temperature of power MOS devices

PESC Record - IEEE Annual Power Electronics Specialists Conference

Volumn 3, Issue , 2000, Pages 1594-1599

  Bergogne, Dominique ^a   Allard, Bruno ^a   Morel, Herve ^a  

^a CNRS   (France)

Author keywords

[No Author keywords available]

Indexed keywords

CHANNEL TEMPERATURE;

FINITE ELEMENT METHOD; INSULATED GATE BIPOLAR TRANSISTORS; MATHEMATICAL MODELS; MICROELECTRONICS; POWER ELECTRONICS; THERMAL EFFECTS;

MOS DEVICES;

EID: 0034473295     PISSN: 02759306     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/PESC.2000.880543     Document Type: Conference Paper

References (11)

1. J.P. Chante, D. Bergogne, "Integrated devices and future trends," Proc. of the 10th International Conference on Microelectronics, Monastir, Tunisie, pp.24-32. 1998.
2. J.M. Fusaro et al, "Thermal characterization of DBC and MMC stacks for power modules," Proc. of IEEE IAS'96, vol. 3, pp. 1411-1417, 1996.
3. B. Beker et al,. "Application of the virtual test bed in the design of power electronic building blocks." Power Electronics 98, pp. 212-224, Nov. 98.
4. H. Holter, T. Schmitt, "AlSiC for thermal management applications," PCIM Europe Magazine, issue 3-99. pp. 24-25, 1999.
5. P. Tounsi, K. Bellil, J.M. Dorkel, "Simulation álectro- thermique en rágime dynamique de modules de puissance multi-puce ou à larges surfaces actives," Proc. of EPF'98, Belfort, France, pp. 199-204, 1998.
6. A. Ammous, Modálisation álectro-thermique de l'IGBT: Application à la simulation du court-circuit. PhD Thesis, INSA de Lyon, Lyon, France. 1998.
7. S. Duong, S. Raël, C. Schaeffer, and J-F. De Palma, Short circuit behavior for PT and NPTIGBT devices - Protection against explosion of the case by fuse, Ferraz, France, 1998.
8. A.Ammous, B. Allard and H. Morel, "Transient Temperature Measurements and Modeling of IGBT's Under Short Circuit," IEEE Trans, on Power Eleclr. vol 13, no.1, pp. 12-25, 1998.
9. A. R. Hefner. Jr and D. M. Diebolt, "An experimentally verified IGBT model implemented in the Saber circuit simulator," IEEE Trans. Power Electr. vol. 9, no5. pp. 532-542, 1994.
10. B. Allard, H. Morel, S. Ghedira and A. Ammous, "A Bond Graph Simulator for Power Train Simulation Including Semiconductor Device Models," Proc. of IEEE-1MACS - CESA'96, Lille, France, pp. 500-505. 1996.
11. A. Ammous, S. Ghedira, B. Allard, H. Morel and D. Renault, "Choosing a Thermal Model for Electro-thermal Simulation of Power Semiconductor Devices," IEEE Trans, on Power Elee, vol. 14, no2, pp. 300-307. march 1999.