An orthogonal 6F2 trench-sidewall vertical device cell for 4Gb/16Gb DRAM

Technical Digest - International Electron Devices Meeting

Volumn , Issue , 2000, Pages 349-352

  Radens, C J ^a   Kudelka, S ^a   Nesbit, L ^a   Malik, R ^a   Dyer, T ^a   Dubuc, C ^a   Joseph, T ^a   Seitz, M ^a   Clevenger, L ^a   Arnold, N ^a   Mandelman, J ^a   Divakaruni, R ^a   Casarotto, D ^a   Lea, D ^a   Jaiprakash, V C ^a   Sim, J ^a   Faltermeier, J ^a   Low, K ^a   Strane, J ^a   Halle, S ^a   Ye, Q ^a   Bukofsky, S ^a   Gruening, U ^a   Schloesser, T ^a   Bronner, G ^a   more..

^a IBM MICROELECTRONICS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITORS; GATES (TRANSISTOR); LITHOGRAPHY; REACTIVE ION ETCHING;

SHALLOW TRENCH ISOLATION (STI); TRENCH CAPACITORS;

DYNAMIC RANDOM ACCESS STORAGE;

EID: 0034454628     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (8)