A high reliability copper dual-damascene interconnection with direct-contact via structure

Technical Digest - International Electron Devices Meeting

Volumn , Issue , 2000, Pages 265-268

  Ueno, K ^a   Suzuki, M ^a   Matsumoto, A ^a   Motoyama, K ^a   Tonegawa, T ^a   Ito, N ^a   Arita, K ^a   Tsuchiya, Y ^a   Wake, T ^a   Kubo, A ^a   Sugai, K ^a   Oda, N ^a   Miyamoto, H ^a   Saito, S ^a  

^a NEC CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

COPPER; CURRENT DENSITY; ELECTROMIGRATION; SEMICONDUCTOR DEVICE STRUCTURES; THERMAL EFFECTS;

COPPER DUAL DAMASCENCE INTERCONNECTS;

LSI CIRCUITS;

EID: 0034453398     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)

1. Full-0.56μm pitch copper interconnects for a high performance 0.15μm CMOS logic device
2. Electromigration reliability study of submicron Cu interconnection
3. Ultra-low resistance direct contact Cu via technology using in-situ chemical vapor cleaning
4. Barrier metal free copper damascene interconnection technology using atmospheric copper reflow and nitrogen doping in SiOF film
5. Experimental data and statistical models for bimodal EM failures
6. Reliability of dual damascene Cu metallization