Total dose performance at 77K of a radiation hard 0.35 μm CMOS SOI technology

IEEE Transactions on Nuclear Science

Volumn 47, Issue 6 III, 2000, Pages 2204-2207

  Jenkins, W C ^a,b   Liu, S T ^c  

^a IEEE   (United States)

^b NAVAL RESEARCH LABORATORY   (United States)

^c HONEYWELL TECHNOLOGY CENTER   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

SEPARATION BY IMPLANTATION OF OXYGEN; SHALLOW TRENCH ISOLATION;

GAMMA RAYS; IONIZING RADIATION; MOSFET DEVICES; RADIATION HARDENING; SILICA; SILICON ON INSULATOR TECHNOLOGY; SILICON WAFERS;

DOSIMETRY;

EID: 0034451637     PISSN: 00189499     EISSN: None     Source Type: Journal    
DOI: 10.1109/23.903754     Document Type: Conference Paper

References (11)

1. Total dose response of transconductance in MOSFET's at low temperature
2. The effects of ionizing radiation on commercial power MOSFET's operated at cryogenic temperatures
3. Worst case total dose radiation response of 0.35 μm SOI CMOSFETs
4. Total dose radiation hard 0.35 μm SOI CMOS technology
5. Freeze-out characterization of radiation hardened n+ polysilicon gate CMOS transistors
6. Hot carrier lifetime of SOI CMOS transistors fabricated in Advantox
7. Formation of interface traps in MOSFET's during annealing following low temperature irradiation
8. Generation of interface states by ionizing radiation at 80 K measured by charge pumping and subthreshold slope techniques
9. Interface state generation in radiation hard oxides