High-density low on-resistance trench MOSFETs employing oxide spacers and self-align technique for DC/DC converter

IEEE International Symposium on Power Semiconductor Devices and ICs (ISPSD)

Volumn , Issue , 2000, Pages 381-384

  Kim, J ^a   Roh, T M ^a   Kim, S G ^a   Song, Q S ^a   Koo, J G ^a   Nam, K S ^a   Cho, K I ^a   Ma, D S ^a  

^a Electronics and Telecommunications Research Institute (ETRI)   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

CURRENT DENSITY; CURRENT VOLTAGE CHARACTERISTICS; DENSITY (SPECIFIC GRAVITY); ELECTRIC CONVERTERS; ELECTRIC RESISTANCE; SCANNING ELECTRON MICROSCOPY; SEMICONDUCTOR DEVICE MANUFACTURE; SEMICONDUCTOR DEVICE STRUCTURES;

SELF-ALIGN TECHNIQUE; SPECIFIC ON-RESISTANCE;

MOSFET DEVICES;

EID: 0034449683     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)

1. 2.5V-driven Nch 3rd generation trench gate MOSFET
2. High-density ultra-low Rdson 30V n-channel trench FETs for DC/DC converter applications
3. A novel trench formation and planarization technique using positive etching and CMP for smart power Ics