Impact of architecture extensions for media signal processing on data-path organization

Conference Record of the Asilomar Conference on Signals, Systems and Computers

Volumn 2, Issue , 2000, Pages 1679-1683

  Farooqui, Aamir A ^a   Oklobdzija, Vojin G ^b  

^a SYNOPSYS INC   (United States)

^b University of California   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER ARCHITECTURE; PARALLEL PROCESSING SYSTEMS; PROGRAM PROCESSORS;

INSTRUCTION SET ARCHITECTURE (ISA); MEDIA SIGNAL PROCESSING;

SIGNAL PROCESSING;

EID: 0034441930     PISSN: 10586393     EISSN: None     Source Type: Journal    
DOI: 10.1109/ACSSC.2000.911275     Document Type: Article

References (18)

1. i860 TM microprocessor family programmers reference manual 1991 Intel corporate literature
2. K. Deifendorff M. Allen Organization of the Motorola 88110 superscalar RISC microprocessor IEEE Micro Mag. 12 40 63 Apr. 1992
3. I. Kuroda T. Nishitani Multimedia processors Proceedings of the IEEE 86 6 1203 1221 June 1998
4. M. Harrand M. Henry P. Chaisemartin P. Mougeat Y. Durand A. Tournier R. Wilson J.-C. Heriuison J.-C. Longcham-bon J.-L. Bauer M. Runts J. Bulone A single chip video-phone video encoder/decoder Dig. Tech. Papers ISSCC'95 Dig. Tech. Papers ISSCC'95 1994-Feb.
5. T. Arai K. Suzuki I. Kuroda V830R/AV: Embedded multimedia superscalar RISC processor with rambus interface Proc. HOTCHIPS IX 177 189 Proc. HOTCHIPS IX 1997-Aug.
6. H. Makino H. Suzuki H. Morinaka Y. Nakase K. Mashiko A 286 MHz 64-bit floating point multiplier with enhanced CG operation Symposium on VLSI Circuits, Digest of Technical Papers Symposium on VLSI Circuits, Digest of Technical Papers 1995
7. PD77016 user's manual 1992 NEC Corporation
8. R. Lee Accelerating multimedia with enhanced microprocessor IEEE Micro 15 2 22 April 1995
9. M. Tremblay J. M. O'Connor V. Narayanan L. He VIS speeds new media processing IEEE Micro Mag. 16 10 20 Aug. 1996
10. M. Tremblay D. Greenley K. Normoyle The design of the microarchitecture of UltraSparc TM-I Proc. IEEE 83 1653 1663 Dec. 1995
11. S. Rathnam G. Slavenburg An architectural overview of the programmable multimedia processor, TM-1 Proceedings of Compcon. 319 326 Proceedings of Compcon. 1996
12. R. B. Lee Subword parallelism with MAX-2 IEEE Micro Mag. 16 51 59 Aug. 1996
13. A. Peleg U. Weiser MMX technology extension to the Intel architecture IEEE Micro Mag. 16 42 50 Aug. 1996
14. L. Gwennap Digital, MIPS add multimedia extensions Microprocessor Rep. 10 15 24 28 Nov. 1996
15. M. S. Schmookler A low-power, high-speed implementation of a PowerPC microprocessor vector extension Proceedings 14th IEEE Symp. on Comp. Arith., '99 12 19 Proceedings 14th IEEE Symp. on Comp. Arith., '99
16. Α. A Farooqui K. W. Current V. G. Oklobdzija Partitioned Branch Condition Resolution Logic Proceedings of the SBCCI'2000-XIII Symposium on Integrated Circuits and Systems Design Proceedings of the SBCCI'2000-XIII Symposium on Integrated Circuits and Systems Design Manaus Brazil Amazons 2000-September-18-24
17. M. Berekovic H. Stolberg M. B. Kulaczewski P. Pisch Instruction set extensions for MPEG-4 video Journal of VLSI signal processing 23 27 49 October 1999
18. Module Compiler™ Reference Manual Version 2000.05 May 2000 USA, Mountain View Synopsys Corporation