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Volumn , Issue , 1998, Pages 47-50
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Magneto-resistive IC memory limitations and architecture implications
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Author keywords
[No Author keywords available]
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Indexed keywords
BANDWIDTH;
COMPUTER ARCHITECTURE;
DYNAMIC RANDOM ACCESS STORAGE;
ELECTRIC POTENTIAL;
MAGNETORESISTANCE;
RANDOM ACCESS STORAGE;
SIGNAL TO NOISE RATIO;
VLSI CIRCUITS;
MAGNETIC TUNNEL JUNCTION;
RESISTOR THERMAL NOISE;
NONVOLATILE STORAGE;
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EID: 0032226501
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (23)
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References (7)
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