A 14b 20MSample/s CMOS pipelined ADC

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn , Issue , 2000, Pages 46-47

  Chen, H S ^a   Bacrania, K ^a   Song, B S ^a  

^a INTERSIL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

AMPLIFIERS (ELECTRONIC); CAPACITORS; CMOS INTEGRATED CIRCUITS; COMPARATOR CIRCUITS; ERRORS; FEEDBACK; SAMPLING; SIGNAL TO NOISE RATIO; TIMING JITTER;

PIPELINED ANALOG TO DIGITAL CONVERTERS;

ANALOG TO DIGITAL CONVERSION;

EID: 0034428841     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (3)

1. A 12b 1MSample/s capacitor error-averaging pipelined A/D converter
2. A 2.5V, 12b, 5MSample/s pipelined CMOS ADC
3. A 240Mb/s, 1-W CMOS EPRML read-channel LSI chip using an interleaved subranging pipeline A/D converter