Optimization of n+ μc-Si:H contact layer for low leakage current in a-Si:H thin film transistors

Journal of Vacuum Science and Technology A: Vacuum, Surfaces and Films

Volumn 18, Issue 2, 2000, Pages 685-687

  Murthy, R V R ^a   Servati, P ^a   Nathan, A ^a   Chamberlain, S G ^b  

^a UNIVERSITY OF WATERLOO   (Canada)

^b DALSA Corporation   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; CRYSTAL DEFECTS; DEPOSITION; DIFFUSION; ELECTRIC CONDUCTIVITY; ELECTRIC POTENTIAL; INTERFACES (MATERIALS); LEAKAGE CURRENTS; OPTIMIZATION; PHOSPHORUS; SEMICONDUCTING SILICON; SEMICONDUCTOR DOPING;

CONTACT LAYER; DRAIN VOLTAGES; GATE VOLTAGE;

THIN FILM TRANSISTORS;

EID: 0034350353     PISSN: 07342101     EISSN: None     Source Type: Journal    
DOI: 10.1116/1.582248     Document Type: Article

References (5)

1. R. A. Street, Mater. Res. Bull. 11, 70 (1992).
2. J. C. McGrody, IBM J. Res. Dev. 36, 2 (1992).
3. R. V. R. Murthy, D. Pereira, B. Park, A. Nathan, and S. G. Chamberlain, Mater. Res. Soc. Symp. Proc. 507, 415 (1998).
4. B. Park, R. V. R. Murthy, K. Benaissa, K. Aflatooni, A. Nathan, R. I. Hornsey, and S. G. Chamberlain, J. Vac. Sci. Technol. A 16, 902 (1998).
5. R. Krankenhagen, M. Schmidt, S. Grebner, M. Poschenrieder, W. Henrion, I. Sieber, S. Koyonov, and R. Schwarz, J. Non-Cryst. Solids 198-200, 923 (1996).