메뉴 건너뛰기




Volumn 28, Issue 5, 2000, Pages 499-534

Loop shifting for loop compaction

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; CODES (SYMBOLS); COMPUTATIONAL COMPLEXITY; CONSTRAINT THEORY; GRAPH THEORY; HEURISTIC PROGRAMMING; ITERATIVE METHODS; OPTIMIZATION; PIPELINE PROCESSING SYSTEMS; POLYNOMIALS; RANDOM PROCESSES;

EID: 0034300447     PISSN: 08857458     EISSN: None     Source Type: Journal    
DOI: 10.1023/A:1007506711786     Document Type: Article
Times cited : (22)

References (30)
  • 2
    • 0032123777 scopus 로고    scopus 로고
    • The IA-64 architecture at work
    • July
    • Carole Dulong, The IA-64 architecture at work, Computer, 31(7):24-32 (July 1998).
    • (1998) Computer , vol.31 , Issue.7 , pp. 24-32
    • Dulong, C.1
  • 4
    • 0042650298 scopus 로고
    • Software pipelining: An effective scheduling technique for VLIW machines
    • ACM Press, Atlanta, Georgia
    • Monica S. Lam, Software pipelining: An effective scheduling technique for VLIW machines, SIGPLAN'88 Conf. Progr. Lang. Design and Implementation, ACM Press, Atlanta, Georgia, pp. 318-328 (1988).
    • (1988) SIGPLAN'88 Conf. Progr. Lang. Design and Implementation , pp. 318-328
    • Lam, M.S.1
  • 5
    • 0003015894 scopus 로고
    • Some scheduling techniques and an easily schedulable horizontal architecture for high performance scientific computing
    • October
    • B. R. Rau and C. D. Glaeser, Some scheduling techniques and an easily schedulable horizontal architecture for high performance scientific computing, Proc. 14th Ann. Workshop of Microprogramming, pp. 183-198 (October 1981).
    • (1981) Proc. 14th Ann. Workshop of Microprogramming , pp. 183-198
    • Rau, B.R.1    Glaeser, C.D.2
  • 6
    • 0030086390 scopus 로고    scopus 로고
    • Iterative modulo scheduling
    • B. R. Rau, Iterative modulo scheduling, IJPP, 24(1):3-64 (1996).
    • (1996) IJPP , vol.24 , Issue.1 , pp. 3-64
    • Rau, B.R.1
  • 10
    • 0028443986 scopus 로고
    • Specification of software pipelining using petri nets
    • M. Rajagopalan and V. H. Allan, Specification of software pipelining using petri nets, IJPP, 22(3):273-301 (1994).
    • (1994) IJPP , vol.22 , Issue.3 , pp. 273-301
    • Rajagopalan, M.1    Allan, V.H.2
  • 12
    • 0026961845 scopus 로고
    • An efficient resource-constrained global scheduling technique for superscalar and VLIW processors
    • Soo-Mook Moon and Kemal Ebcioǧlu, An efficient resource-constrained global scheduling technique for superscalar and VLIW processors, 25th Ann. Int'l. Symp. Microarchitecture, pp. 55-71 (1992).
    • (1992) 25th Ann. Int'l. Symp. Microarchitecture , pp. 55-71
    • Moon, S.-M.1    Ebcioǧlu, K.2
  • 14
    • 0028715149 scopus 로고
    • Generating close to optimum loop schedules on parallel processors
    • F. Gasperoni and U. Schwiegelshohn, Generating close to optimum loop schedules on parallel processors, Parallel Proc. Lett., 4(4):391-403 (1994).
    • (1994) Parallel Proc. Lett. , vol.4 , Issue.4 , pp. 391-403
    • Gasperoni, F.1    Schwiegelshohn, U.2
  • 15
    • 0028442958 scopus 로고
    • Decomposed software pipelining
    • J. Wang, C. Eisenbeis, M. Jourdan, and B. Su, Decomposed software pipelining, IJPP, 22(3):351-373 (1994).
    • (1994) IJPP , vol.22 , Issue.3 , pp. 351-373
    • Wang, J.1    Eisenbeis, C.2    Jourdan, M.3    Su, B.4
  • 16
    • 0031672884 scopus 로고    scopus 로고
    • Circuit retiming applied to decomposed software pipelining
    • January
    • P.-Y. Calland, A. Darte, and Y. Robert, Circuit retiming applied to decomposed software pipelining, IEEE Trans. Parallel Distrib. Syst., 9(1):24-35 (January 1998).
    • (1998) IEEE Trans. Parallel Distrib. Syst. , vol.9 , Issue.1 , pp. 24-35
    • Calland, P.-Y.1    Darte, A.2    Robert, Y.3
  • 19
    • 0002591492 scopus 로고
    • Cyclic scheduling on parallel processors: An overview
    • P. Chrétienne, E. G. Coffman, Jr., J. K. Lenstra, and Z. Liu (eds.), John Wiley
    • C. Hanen and A. Munier, Cyclic scheduling on parallel processors: An overview. In P. Chrétienne, E. G. Coffman, Jr., J. K. Lenstra, and Z. Liu (eds.), Scheduling Theory and Its Applications, John Wiley (1995).
    • (1995) Scheduling Theory and Its Applications
    • Hanen, C.1    Munier, A.2
  • 21
    • 0343652447 scopus 로고    scopus 로고
    • Myricom, Inc. LANai 3.0 instruction set. Electronic document
    • Myricom, Inc. LANai 3.0 instruction set. Electronic document http://www.myricom.com/ scs/L3/doc/inst_toc.html.
  • 22
  • 23
    • 0026005478 scopus 로고
    • Retiming synchronous circuitry
    • C. E. Leiserson and J. B. Saxe, Retiming synchronous circuitry, Algorithmica, 6(1):5-35 (1991).
    • (1991) Algorithmica , vol.6 , Issue.1 , pp. 5-35
    • Leiserson, C.E.1    Saxe, J.B.2
  • 24
    • 0343652445 scopus 로고
    • On the relationship between sequential logic retiming and loop folding
    • Nara, Japan, October
    • Tsing-Fa Lee Allen, C.-H. Wu Wei-Jeng Chen, Wei-Kai Cheng, and Youn-Long Lin, On the relationship between sequential logic retiming and loop folding, Proc. SASIMI'93, Nara, Japan, pp. 384-393 (October 1993).
    • (1993) Proc. SASIMI'93 , pp. 384-393
    • Allen, T.-F.L.1    Wu, C.-H.2    Chen, W.-J.3    Cheng, W.-K.4    Lin, Y.-L.5
  • 25
    • 0342782260 scopus 로고    scopus 로고
    • Combining retiming and scheduling techniques for loop parallelization and loop tiling
    • Alain Darte, Georges-André Silber, and Frédéric Vivien, Combining retiming and scheduling techniques for loop parallelization and loop tiling, Parallel Proc. Lett., 7(4):379-392 (1997).
    • (1997) Parallel Proc. Lett. , vol.7 , Issue.4 , pp. 379-392
    • Darte, A.1    Silber, G.-A.2    Vivien, F.3
  • 26
    • 0343652444 scopus 로고
    • Transforming cyclic scheduling problems into acyclic ones
    • P. Chrétienne, E. G. Coffman, Jr., J. K. Lenstra, and Z. Liu (eds.), John Wiley
    • F. Gasperoni and U. Schwiegelshohn, Transforming cyclic scheduling problems into acyclic ones. In P. Chrétienne, E. G. Coffman, Jr., J. K. Lenstra, and Z. Liu (eds.), Scheduling Theory and Its Applications, John Wiley, pp. 241-258 (1995).
    • (1995) Scheduling Theory and Its Applications , pp. 241-258
    • Gasperoni, F.1    Schwiegelshohn, U.2
  • 27
    • 0343216833 scopus 로고    scopus 로고
    • Trimaran, An infrastructure for research in instruction level parallelism. Electronic document
    • Trimaran, An infrastructure for research in instruction level parallelism. Electronic document http://www.trimaran.org.


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.