Combining retiming and scheduling techniques for loop parallelization and loop tiling'

Parallel Processing Letters

Volumn 7, Issue 4, 1997, Pages 379-392

  Darte, Alain ^a  

^a UNIVERSITÉ DE LYON   (France)

Author keywords

Automatic parallelization; Medium grain; Nested loops; Permutable loops; Tiling

Indexed keywords

EID: 0342782260     PISSN: 01296264     EISSN: None     Source Type: Journal    
DOI: 10.1142/S0129626497000383     Document Type: Article

References (1)

1. Pierre Boulet, Alain Darte, Tanguy Risset, and Yves Robert, (pen)-ultimate tiling? Integration, the VLSI Journal. 17:33-51, 1994.