Hardware Implementation of Montgomery’s Modular Multiplication Algorithm

IEEE Transactions on Computers

Volumn 42, Issue 6, 1993, Pages 693-699

  Eldridge, Stephen E ^a   Walter, Colin D ^a  

^a UNIVERSITY OF MANCHESTER   (United Kingdom)

Author keywords

Digital arithmetic; fast computer arithmetic; modular multiplication; parallel bit operations; public key cryptography; redundant number systems; RSA algorithm

Indexed keywords

COMBINATORIAL MATHEMATICS; COMPUTER ARCHITECTURE; COMPUTER HARDWARE; CRYPTOGRAPHY; DIGITAL ARITHMETIC; FORMAL LOGIC; NUMBER THEORY; PARALLEL PROCESSING SYSTEMS;

FAST COMPUTER ARITHMETIC; HARDWARE IMPLEMENTATION; MODULAR MULTIPLICATION ALGORITHMS; PARALLEL BIT OPERATIONS; PUBLIC KEY CRYPTOGRAPHY; REDUNDANT NUMBER SYSTEMS; RIVEST-SHAMIR-ADLEMAN ALGORITHMS;

ALGORITHMS;

EID: 0027606916     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/12.277287     Document Type: Article

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