Impact of cooling rate in annealing for iron gettering in p/p+ silicon device wafers

Electrochemical and Solid-State Letters

Volumn 3, Issue 7, 2000, Pages 343-345

  Horikawa, Mitsuhiro ^a  

^a NEC CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

ANNEALING; COOLING; DIFFUSION IN SOLIDS; GATES (TRANSISTOR); IRON; LEAKAGE CURRENTS; SEMICONDUCTOR DEVICE STRUCTURES; SILICON WAFERS;

GETTERING;

SEMICONDUCTOR JUNCTIONS;

EID: 0034227959     PISSN: 10990062     EISSN: None     Source Type: Journal    
DOI: 10.1149/1.1391144     Document Type: Article

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