Pipelined computation of very large word-length LNS addition/subtraction with polynomial hardware cost

IEEE Transactions on Computers

Volumn 49, Issue 7, 2000, Pages 716-726

  Chen, Chichyang ^a,b   Chen, Rui Lin ^b   Yang, Chih Huan ^c  

^a IEEE   (Taiwan)

^b FENG CHIA UNIVERSITY   (Taiwan)

^c Matsushita Electric (Taiwan) Co Ltd   (Taiwan)

Author keywords

Digit on line algorithms; Exponentials; Logarithmic arithmetic; Logarithmic number system; Logarithms; Pipelined architecture

Indexed keywords

ALGORITHMS; CALCULATIONS; COMPUTATIONAL COMPLEXITY; COMPUTER CIRCUITS; ERROR ANALYSIS; ONLINE SYSTEMS; PARALLEL PROCESSING SYSTEMS; PIPELINE PROCESSING SYSTEMS; POLYNOMIALS;

EXPONENTIALS; LOGARITHM ARITHMETIC; LOGARITHMIC NUMBER SYSTEM; VERY LARGE WORD LENGTH;

DIGITAL ARITHMETIC;

EID: 0034215827     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/12.863041     Document Type: Article

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