High concentration impurity diffusion profile model

Solid-State Electronics

Volumn 44, Issue 3, 2000, Pages 457-463

  Suzuki, Kunihiro ^a  

^a FUJITSU LABORATORIES LTD   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; IMPURITIES; ION IMPLANTATION; MATHEMATICAL MODELS; NONLINEAR EQUATIONS; ONE DIMENSIONAL; SEMICONDUCTING SILICON; SUPERSATURATION; SURFACE PROPERTIES;

ANDERSON MODEL; IMPURITY DIFFUSION PROFILE MODEL; SURFACE CONCENTRATION;

DIFFUSION IN SOLIDS;

EID: 0034159498     PISSN: 00381101     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0038-1101(99)00270-1     Document Type: Article

References (18)

1. Dennard R.H., Gaensslen F.H., Yu H.N., Rideout V.L., Bassous E., Blanc A.L. Design of ion-implanted MOSFETs with very small physical dimensions. IEEE J. Sold-State Circuits. SC-9:1974;256-268.
2. Brews J.R., Fichtner W., Nicollian E.H., Sze S.M. Generalized guide for MOSFET miniaturization. IEEE Electron Dev. Lett. EDL-1:1980;2-4.
3. Chatterjee P., Hunter W.R., Holloway T.C., Lin Y.T. The impact of scaling laws on the choice of n-channel or p-channel for MOS VLSI. IEEE Electron Dev. Lett. EDL-1:1980;220-223.
4. Baccarani G., Wordeman M.R., Dennard R.H. Generalized scaling theory and its application to a 1/4 micrometer MOSFET design. IEEE Trans. Electron Dev. ED-31:1984;452-462.
5. Chan T.Y., Ko P.K., Hu C. Dependence of channel electric field on device scaling. IEEE Electron Dev. Lett. EDL-6:1985;551-553.
6. Goto K, Matsuo J, Tada Y, Tanaka T, Momiyama Y, Sugii T, Yamada I. A high performance 50 nm PMOSFET using decaborane (B10H14) ion implantation and 2-step activation annealing process. International Electron Device Meeting 1997:471-4.
7. 2. J. Electrochem. Society. 118:1971;293-299.
8. Fair R.B. High concentration arsenic diffusion in silicon from a doped oxide source. J. Electrochem. Society. 119:1989;1389-1394.
9. Suzuki K, Miyashita T, Tada Y, Hoefler A, Strecker N, Fichtner W. Damage calibration concept and novel B cluster reaction model for B transient enhanced diffusion over thermal process range from 600°C (839 h) to 1100 (5 s) with various ion implantation doses and energies. International Electron Device Meeting 1997:501-4.
10. Ghandhi S.K. VLSI Fabrication Principles. 1994;Wiley, New York.
11. Nakajima Y., Ohkawa S., Fukukawa Y. Simplified expression for the distribution of diffused impurity. Japan J. Appl. Phys. 10:1971;162-163.
12. Fair R.B., Tsai J.C.C. The diffusion of ion-implanted arsenic in silicon. J. Electrochem. Society. 122:1975;1689-1696.
13. Fair R.B., Tsai J.C.C. Profile parameters of implanted-diffused arsenic layers in silicon. J. Electrochem. Society. 123:1976;583-586.
14. Fair R.B. Boron diffusion in silicon-concentration and orientation dependence, background effects, and profile estimation. J. Electrochem. Society. 122:1975;800-805.
15. Anderson D., Liasak M. Approximate solutions of some nonlinear diffusion equations. Physical Review A. 22:1980;2761-2768.
16. Anderson D., Jeppson K.O. Nonlinear two-step diffusion in semiconductors. J. Electrochem. Society. 131:1984;2675-2679.
17. ISE TCAD MANUALS, Vol. 2, release 5, Part 7.
18. Morin F.J., Maita J.P. Electrical properties of silicon containing arsenic and boron. Physical Review. 96:1954;28-35.