Peripheral loss reduction of high efficiency silicon solar cells by MOS gate passivation, by poly-Si filled grooves and by cell pattern design

Progress in Photovoltaics: Research and Applications

Volumn 8, Issue 2, 2000, Pages 201-210

  Zhao, Jianhua ^a   Wang, Aihua ^a   Altermatt, Pietro P ^a   Zhang, Guangchun ^a  

^a UNIVERSITY OF NEW SOUTH WALES   (Australia)

Author keywords

[No Author keywords available]

Indexed keywords

DESIGN; EFFICIENCY; ELECTRIC CURRENTS; ELECTRIC DISCHARGES; ELECTRIC POTENTIAL; GATES (TRANSISTOR); MATHEMATICAL MODELS; MOS DEVICES; PASSIVATION; POLYSILANES; TWO DIMENSIONAL;

CELL PATTERN DESIGN; LASER CUT GROOVES; PASSIVATED EMITTER REAR LOCALLY DIFFUSED; PERIPHERAL LOSS; POSITIVE VOLTAGE; SHORT CIRCUIT CURRENT;

SILICON SOLAR CELLS;

EID: 0034149179     PISSN: 10627995     EISSN: None     Source Type: Journal    
DOI: 10.1002/(SICI)1099-159X(200003/04)8:2<201::AID-PIP288>3.0.CO;2-V     Document Type: Article

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