Via design rule consideration in multilayer maze routing algorithms

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 19, Issue 2, 2000, Pages 215-223

  Cong, Jason ^a   Fang, Jie ^a   Khoo, Kei Yong ^a  

^a University of California   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; CMOS INTEGRATED CIRCUITS; COMPUTER AIDED DESIGN; GRAPH THEORY; HEURISTIC METHODS; YIELD STRESS;

MAZE ROUTING ALGORITHMS; MULTILAYER ROUTING; VIA DESIGN RULE;

INTEGRATED CIRCUIT LAYOUT;

EID: 0033904916     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/43.828550     Document Type: Article

References (9)

1. E. W. Dijkstra, "A note on two problems in connexion with graphs," Numerische Mathematik, vol. 1, pp. 269-271, 1959.
2. C. Lee, "An algorithm for path connections and its applications," IRE Trans Electron. Computers, vol. EC-10, pp. 346-365, Jan. 1961.
3. R. Bellman, Dynamic Programming. Princeton, NJ: Princeton Univ. Press, 1957.
4. M. Arnold and W. Scott, "An interactive maze router with hints," in Proc. 25th ACM/IEEE Design Automation Conf., 1988, pp. 672-676.
5. W. Schiele, T. Kruger, K. Just, and F. Kirsch, "A gridless router for industrial design rules," in Proc. 27th ACM/IEEE Design Automation Conf., June 1990, pp. 626-631.
6. A. Tetelbaum, "Generalized optimum path search," IEEE Trans. Computer-Aided Design, vol. 14, pp. 1586-1590, Dec. 1995.
7. J. Soukup, "Maze router without a grid map," in Proc. IEEE/ACM Int. Conf. Computer-Aided Design, Nov. 1992, pp. 382-385.
8. J. Cong, J. Fang, and K. Y. Khoo, "Via design rule consideration in multilayer maze routing algorithms," in Proc. Int. Symp. Physical Design, Apr. 1999, pp. 214-220.
9. -, "An implicit connection graph maze routing algorithm for ECO routing," in Proc. ACM/IEEE Int. Conf. Computer Aided Design, Nov. 1999, pp. 163-167.