Via design rule consideration in multi-layer maze routing algorithms

Proceedings of the International Symposium on Physical Design

Volumn , Issue , 1999, Pages 214-220

  Gong, Jason ^a   Fang, Jie ^a   Khoo, Kei Yong ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; CMOS INTEGRATED CIRCUITS; INTEGRATED CIRCUIT LAYOUT; MULTICHIP MODULES; PRINTED CIRCUIT BOARDS;

MAZE ROUTING;

VLSI CIRCUITS;

EID: 0032659674     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Article

References (7)