Novel capacitor process using diffusion barrier rounded by Si3N4 spacer for high density FRAM device

IEEE Electron Device Letters

Volumn 21, Issue 6, 2000, Pages 280-282

  Koo, Bon Jae ^a   Song, Yoon Jong ^a   Lee, Sung Yung ^a   Jung, Dong Jin ^a   Kim, Hyun Ho ^a   Joo, Suk Ho ^a   Lee, Yong Tak ^a   Kim, Kinam ^a  

^a SAMSUNG Electronics   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITORS; DIFFUSION IN SOLIDS; ETCHING; FERROELECTRIC DEVICES; SEMICONDUCTING LEAD COMPOUNDS; SEMICONDUCTING SILICON COMPOUNDS; SOL-GELS; SUBSTRATES;

FERROELECTRIC RANDOM ACCESS MEMORY (FRAM);

RANDOM ACCESS STORAGE;

EID: 0033736468     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/55.843150     Document Type: Article

References (7)

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7. S. D. Traynor, T. D. Hadnagy, and L. Kammerciner, "Capacitor test simulation of retention and imprint characteristics for ferroelectric memory operation," Integr. Ferroelect., vol. 16, p. 63, 1997.