Digital offset compensation of time-interleaved ADC using random chopper sampling

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 3, Issue , 2000, Pages III-447-III-450

  Eklund, Jan Erik ^a   Gustafsson, Fredrik ^b  

^a ERICSSON RADIO SYSTEMS AB   (Sweden)

^b LINKÖPING UNIVERSITY   (Sweden)

Author keywords

[No Author keywords available]

Indexed keywords

CHOPPERS (CIRCUITS); ELECTRIC DISTORTION; RANDOM PROCESSES; SAMPLING; SIGNAL TO NOISE RATIO; SPURIOUS SIGNAL NOISE;

DIGITAL OFFSET COMPENSATION;

ANALOG TO DIGITAL CONVERSION;

EID: 0033714203     PISSN: 02714310     EISSN: None     Source Type: Journal    
DOI: 10.1109/ISCAS.2000.856093     Document Type: Article

References (6)

1. K. Y. Kim N. Kusayanagi A. Abidi A 10-b, 100MS/ s CMOS A/D converter IEEE Journal of Solid State Circuits 32 302 311 March 1997
2. J. Yuan C. Svensson A 10-bit 5MS/s successive approximation ADC cell used in a 70MS/s ADC array in 1.2μm CMOS IEEE Journal of Solid State Circuits 29 866 872 August 1994
3. N. Kusayanagi T. Choi M. Hiwatashi M. Segami Y. Akasaka T. Wakabayashi A 25 Ms/s 8-b-1-Ms/s 10-b CMOS Data Acquisition IC for Digital Storage Oscilloscopes IEEE Journal of Solid State Circuits 33 492 496 March 1998
4. H. Jin E. Lee M. Hassoun Time-Interleaved A/D Converter with Channel Randomization ISCAS'97 425 428 ISCAS'97 1997-June-9-12
5. K. Dyer D. Fu P. Hurst S. Lewis A comparision of monolithic background calibration in two time-interleaved analog-to-digital converters ISCAS'98 13 16 ISCAS'98
6. J.-E. Eklund A 200 MHz cell for a parallel-successive-approximation ADC in 0.8 μm CMOS, using a reference pre-select scheme Proceedings of ESSCIRC 23 388 391 Proceedings of ESSCIRC Southampton UK 1997-September-16-18