Compiling and optimizing image processing algorithms for FPGA's

Computer Architectures for Machine Perception, Proceedings (CAMP)

Volumn , Issue , 2000, Pages 222-231

  Draper, Bruce ^a   Najjar, Walid ^a   Bohm, Wim ^a   Hammes, Jeff ^a   Rinker, Bob ^a   Ross, Charlie ^a   Chawathe, Monica ^a   Bins, Jose ^a  

^a Veterinary Dentistry and Oral Surgery   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DATA FLOW GRAPHS;

ALGORITHMS; DATA FLOW ANALYSIS; HIGH LEVEL LANGUAGES; IMAGE PROCESSING; PROGRAM COMPILERS;

FIELD PROGRAMMABLE GATE ARRAYS;

EID: 0033711580     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Article

References (8)

1. DeHon, A., "The Density Advantage of Reconfigurable Computing", IEEE Computer, 2000. 33(4): p. 41-49.
2. Benedetti, A. and P. Perona. "Real-time 2-D Feature Detection on a Reconfigurable Computer", in IEEE Conference on Computer Vision and Pattern Recognition. 1998. Santa Barbara, CA: IEEE Press.
3. Woodfill, J. and B.v. Herzen. "Real-Time Stereo Vision on the PARTS Reconfigurable Computer", in IEEE Symposium on Field-Programmable Custom Computing Machines. 1997. Napa, CA: IEEE Press.
4. Benitez, D. and J. Cabrera. "Reactive Computer Vision System with Reconfigurable Architecture", in International Conference on Vision Systems. 1999. Las Palmas de Gran Canaria: Springer.
5. Hammes, J.P., B.A. Draper, and A.P.W. Böhm. "Sassy: A Language and Optimizing Compiler for Image Processing on Reconfigurable Computing Systems," in International Conference on Vision Systems. 1999. Las Palmas de Gran Canaria, Spain: Springer.
6. Ellis, T., J. Phillips, and T. Lahey, Fortran 90 Programming. 1994: Addison-Wesley.
7. Dennis, J.B., "The evolution of 'static' dataflow architecture", in Advanced Topics in Data-Flow Computing, J.L. Gaudiot and L. Bic, Editors. 1991, Prentice-Hall.
8. Rinker, R., et al. "Compiling Image Processing Application to Reconfigurable Hardware", in IEEE International Conference on Application-specific Architectures and Processors. 2000. Boston.