Low-cost unified architectures for the computation of discrete trigonometric transforms

ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings

Volumn 6, Issue , 2000, Pages 3299-3302

  Hsiao, Shen Fu ^a   Shiue, Wei Ren ^a  

^a NATIONAL SUN YAT SEN UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER ARCHITECTURE; COSINE TRANSFORMS; DESIGN FOR TESTABILITY; DISCRETE FOURIER TRANSFORMS; FAST FOURIER TRANSFORMS; HARDWARE; MATRIX ALGEBRA; NETWORK ARCHITECTURE; SIGNAL PROCESSING; ALGORITHMS; MATHEMATICAL TRANSFORMATIONS; VLSI CIRCUITS;

DIAGONAL MATRICES; DISCRETE COSINE TRANSFORM(DCT); DISCRETE HARTLEY TRANSFORMS; DISCRETE SINE TRANSFORMS; EFFICIENT ARCHITECTURE; PROCESSING ELEMENTS; UNIFIED ARCHITECTURE; VLSI ARCHITECTURES;

DISCRETE COSINE TRANSFORMS; DIGITAL SIGNAL PROCESSING;

DISCRETE COSINE TRANSFORM; DISCRETE FOURIER TRANSFORM; DISCRETE HARTLEY TRANSFORM; DISCRETE SINE TRANSFORM; DISCRETE TRIGONOMETRIC TRANSFORMS;

EID: 0033709663     PISSN: 15206149     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICASSP.2000.860105     Document Type: Conference Paper

References (7)

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