-
1
-
-
0029357395
-
Quality of service guarantees in virtual circuit switched networks
-
Aug.
-
R. L. Cruz, "Quality of service guarantees in virtual circuit switched networks," IEEE J. Select. Areas Commun., vol. 13, pp. 1048-1056, Aug. 1995.
-
(1995)
IEEE J. Select. Areas Commun.
, vol.13
, pp. 1048-1056
-
-
Cruz, R.L.1
-
2
-
-
0029754881
-
ATM traffic management with diversified loss and delay requirements
-
G. Chen and I. Stavrakakis, "ATM traffic management with diversified loss and delay requirements," in Proc. IEEE INFOCOM, 1996, pp. 1037-1044.
-
(1996)
Proc. IEEE INFOCOM
, pp. 1037-1044
-
-
Chen, G.1
Stavrakakis, I.2
-
3
-
-
0030083961
-
Alternative architectures for high speed packet switching
-
Feb.
-
R. L. Cruz and J. T. Tsai, "Alternative architectures for high speed packet switching," IEEE/ACM Trans. Networking, vol. 4, pp. 11-21, Feb. 1996.
-
(1996)
IEEE/ACM Trans. Networking
, vol.4
, pp. 11-21
-
-
Cruz, R.L.1
Tsai, J.T.2
-
4
-
-
33747826898
-
A high-speed hardware efficient optical sorting network
-
R. Kannan, K. Y. Lee, and H. F. Jordan, "A high-speed hardware efficient optical sorting network," in Proc. Asia-Pacific Conf. Communications, 1995, pp. 873-877.
-
(1995)
Proc. Asia-Pacific Conf. Communications
, pp. 873-877
-
-
Kannan, R.1
Lee, K.Y.2
Jordan, H.F.3
-
5
-
-
0031165147
-
The single-queue switch: A building block for switches with programmable scheduling
-
June
-
M. R. Hashemi and A. Leon-Garcia, "The single-queue switch: A building block for switches with programmable scheduling," IEEE J. Select. Areas Commun., vol. 15, pp. 785-794, June 1997.
-
(1997)
IEEE J. Select. Areas Commun.
, vol.15
, pp. 785-794
-
-
Hashemi, M.R.1
Leon-Garcia, A.2
-
6
-
-
0038517338
-
Tagged up/down sorter - A hardware priority queue
-
Sept.
-
S. W. Moore and B. T. Graham, "Tagged up/down sorter - A hardware priority queue," Computer J., vol. 38, no. 9, pp. 695-703, Sept. 1995.
-
(1995)
Computer J.
, vol.38
, Issue.9
, pp. 695-703
-
-
Moore, S.W.1
Graham, B.T.2
-
7
-
-
33747836532
-
CAN (controller area network) controller for real-time use
-
May
-
A. R. Krappel, "CAN (controller area network) controller for real-time use," Elektronik, vol. 46, no. 10, pp. 88-92, May 1997.
-
(1997)
Elektronik
, vol.46
, Issue.10
, pp. 88-92
-
-
Krappel, A.R.1
-
8
-
-
0030288913
-
On the limits of ATM switching
-
Nov./Dec.
-
S. E. Butner and R. Chivukula, "On the limits of ATM switching," IEEE Network Mag., vol. 10, pp. 26-31, Nov./Dec. 1996.
-
(1996)
IEEE Network Mag.
, vol.10
, pp. 26-31
-
-
Butner, S.E.1
Chivukula, R.2
-
10
-
-
0025505116
-
An experimental ATM switch for BISDN studies
-
R. Palmer, "An experimental ATM switch for BISDN studies," Int. J. Digital and Analog Communication, vol. 3, no. 4, pp. 341-349, 1990.
-
(1990)
Int. J. Digital and Analog Communication
, vol.3
, Issue.4
, pp. 341-349
-
-
Palmer, R.1
-
11
-
-
23544474598
-
Latency and throughput tradeoffs in self-timed asynchronous pipelines and rings
-
Aug.
-
T. E. Williams, "Latency and throughput tradeoffs in self-timed asynchronous pipelines and rings," Stanford Univ., Stanford, CA, Tech. Rep. CSL-TR-90-431, Aug. 1990.
-
(1990)
Stanford Univ., Stanford, CA, Tech. Rep. CSL-TR-90-431
-
-
Williams, T.E.1
-
12
-
-
0033078504
-
Automatic synthesis of extended burst-mode circuits: Part I (specification and hazard-free implementations)
-
Feb.
-
K. Y. Yun and D. L. Dill, "Automatic synthesis of extended burst-mode circuits: Part I (specification and hazard-free implementations)," IEEE Trans. Computer-Aided Design, vol. 18, pp. 101-117, Feb. 1999.
-
(1999)
IEEE Trans. Computer-Aided Design
, vol.18
, pp. 101-117
-
-
Yun, K.Y.1
Dill, D.L.2
-
13
-
-
0033079019
-
Automatic synthesis of extended burst-mode circuits: Part II (automatic synthesis)
-
Feb.
-
_, "Automatic synthesis of extended burst-mode circuits: Part II (automatic synthesis)," IEEE Trans. Computer-Aided Design, vol. 18, pp. 118-132, Feb. 1999.
-
(1999)
IEEE Trans. Computer-Aided Design
, vol.18
, pp. 118-132
-
-
-
16
-
-
0003943109
-
-
Washington Univ., Seattle, Rep. WUCS 97-21, May
-
J. Turner and N. Yamanaka, "Architectural choices in large scale ATM switches," Washington Univ., Seattle, Rep. WUCS 97-21, May 1997.
-
(1997)
Architectural Choices in Large Scale ATM Switches
-
-
Turner, J.1
Yamanaka, N.2
|