Robust parameter design for integrated circuit fabrication procedure with respect to categorical characteristic

Reliability Engineering and System Safety

Volumn 66, Issue 3, 1999, Pages 253-260

  Sohn, S Y ^a  

^a Yonsei University   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; CUTTING; MASKS; MATHEMATICAL MODELS; OPTIMIZATION; PARAMETER ESTIMATION; PROCESS ENGINEERING; RELIABILITY; TEMPERATURE; VISCOSITY;

BOOTSTRAP SAMPLING; DIRICHLET MULTINOMIAL DISTRIBUTION; EMPIRICAL BAYES ESTIMATOR; RANDOM EFFECT ANALYSIS; ROBUST DESIGN; WINDOW CUTTING PROCESS;

INTEGRATED CIRCUIT MANUFACTURE;

EID: 0033349569     PISSN: 09518320     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0951-8320(99)00038-1     Document Type: Article

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