Thermal management of power electronics modules packaged by a stacked-plate technique

Microelectronics Reliability

Volumn 39, Issue 9, 1999, Pages 1343-1349

  Haque, Shatil ^a   Stinnett, William A ^a   Nelson, Douglas J ^a   Lu, Guo Quan ^a  

^a VIRGINIA POLYTECHNIC INSTITUTE AND STATE UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRONICS PACKAGING; RELIABILITY; SEMICONDUCTOR DEVICE MANUFACTURE; SEMICONDUCTOR DEVICE MODELS; TEMPERATURE CONTROL;

METAL POSTS INTERCONNECTED PARALLEL PLATE STRUCTURE TECHNIQUES; THERMAL MANAGEMENT;

POWER ELECTRONICS;

EID: 0033344151     PISSN: 00262714     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0026-2714(99)00055-4     Document Type: Article

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