Solution of a complex via-pin connector problem using the partial element equivalent circuit (PEEC) method

IEEE International Symposium on Electromagnetic Compatibility

Volumn 2, Issue , 1999, Pages 673-678

  Ruehli, Albert E ^a   Papadopoulos, George ^a  

^a IBM RESEARCH   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CLOCKS; COMPUTER WORKSTATIONS; ELECTRIC NETWORK ANALYSIS; ELECTROMAGNETIC COMPATIBILITY; PROBLEM SOLVING; TIMING CIRCUITS; DIFFERENTIAL EQUATIONS; ELECTRIC PROPERTIES; EQUIVALENT CIRCUITS; INTEGRAL EQUATIONS; INTEGRATED CIRCUITS; MATHEMATICAL MODELS; PERMITTIVITY; TIME DOMAIN ANALYSIS;

COMPUTER PACKAGES; CONVENTIONAL CIRCUITS; ELECTROMAGNETIC PROBLEMS; ELECTRONIC SYSTEMS; EXPERIMENTAL PROGRAM; MULTIPLE GROUNDS; PARTIAL-ELEMENT EQUIVALENT-CIRCUIT METHODS; REALISTIC GEOMETRY;

EQUIVALENT CIRCUITS; ELECTROMAGNETIC WAVE INTERFERENCE;

CONNECTING PINS; MULTIPLE GROUND PINS; PARTIAL ELEMENT EQUIVALENT CIRCUIT METHOD;

EID: 0033332184     PISSN: 10774076     EISSN: 21581118     Source Type: Conference Proceeding    
DOI: 10.1109/ISEMC.1999.810098     Document Type: Conference Paper

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