Void-effect modeling of flip-chip encapsulation on ceramic substrate

IEEE Transactions on Components and Packaging Technologies

Volumn 22, Issue 4, 1999, Pages 484-487

  Niu, Tyan Min ^a  

^a IBM MICROELECTRONICS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CERAMIC MATERIALS; COMPUTER SIMULATION; ENCAPSULATION; FINITE ELEMENT METHOD; INTEGRATED CIRCUIT MANUFACTURE; MATHEMATICAL MODELS; SOLDERING; STRAIN; STRESS ANALYSIS; SUBSTRATES; THERMAL CYCLING; THERMOANALYSIS;

ACCELERATED THERMAL CYCLING (ATC); VOID-EFFECT MODELING;

FLIP CHIP DEVICES;

EID: 0033319677     PISSN: 15213331     EISSN: None     Source Type: Journal    
DOI: 10.1109/6144.814962     Document Type: Article

References (8)

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7. P. M. Hall Force moments and displacements during thermal chamber cycling of leadless ceramic chip carriers soldered to printed boards IEEE Trans. Comp. Hybrids Manufact. Technol. vol. CHMT-7 pp. 314-327 Dec. 1984.
8. V. Gektin A. Bar-Cohen and J. Ames Coffin-Manson fatigue model of underfilled flip-chips IEEE Trans. Comp. Packag. Manufact. Technol. A. vol. 20 pp. 317-326 Sept. 1997.