High reliability, high density, low cost packaging systems for matrix systems for matrix ega and csp by vacuum printing encapsulation systems (vpes)

IEEE Transactions on Advanced Packaging

Volumn 22, Issue 3, 1999, Pages 391-397

  Okuno, Atsushi ^a  

^a Japan Rec Co   (Japan)

Author keywords

Ball grid array; Chip on board; Chip size packaging; Large scale integrated circuit; Multichip module; Printing encapsulation systems; Tape automated bonding; Vacuum printing encapsulation systems

Indexed keywords

ELECTRONICS PACKAGING; MULTICHIP MODULES;

VACUUM PRINTING ENCAPSULATION SYSTEMS (VPES);

LSI CIRCUITS;

EID: 0033310945     PISSN: 15213323     EISSN: None     Source Type: Journal    
DOI: 10.1109/6040.784492     Document Type: Article

References (8)

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3. _, "Printing encapsulation systems (PES) of some BGA packaging," in Proc. ISHM'96, pp. 103-106, 1996.
4. _, "Properties and reliability of liquid epoxy resin for LSI fabrication with printing encapsulation systems (PES)," Electron. Commun. Jpn., part 2, vol. J79-C-2, pp. 43139, 1996
5. _, "Flip-chip packaging using printing encapsulation systems (PES), and PES'S under-fill epoxy resin," in Proc. 45th Electron. Comp. Technol. Conf., 1995, pp. 1240-1243.
6. ___, U.S. Patent 5232651.
7. ___, JP P H3-145750.
8. ___, "High Reliability, high density, low cost packaging systems for matrix BGA and CSP using vacuum printing encapsulation systems (VPES)," 48th, pp. 109-110, 1998.