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Volumn 46, Issue 2, 1999, Pages 73-77

A 250-ps Time-Resolution CMOS Multihit Time-to-Digital Converter for Nuclear Physics Experiments

Author keywords

Application specific integrated circuit; Delay lines; Delay lock loop; Time measurements

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; DELAY CIRCUITS; ELECTRIC NETWORK SYNTHESIS; INTEGRATED CIRCUIT LAYOUT; NUCLEAR PHYSICS;

EID: 0033279234     PISSN: 00189499     EISSN: None     Source Type: Journal    
DOI: 10.1109/23.757192     Document Type: Article
Times cited : (24)

References (10)
  • 1
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    • Apr.
    • P. Andreani, F. Bigongiari, R. Roncella, R. Saletti, P. Terreni, A. Bigongiari, and M. Lippi, "Multihit multichannel time-to-digital converter with ±1% differential nonlinearity and near optimal time resolution," IEEE J. Solid-State Circuits, vol. 33, pp. 650-656, Apr. 1998.
    • (1998) IEEE J. Solid-State Circuits , vol.33 , pp. 650-656
    • Andreani, P.1    Bigongiari, F.2    Roncella, R.3    Saletti, R.4    Terreni, P.5    Bigongiari, A.6    Lippi, M.7
  • 2
    • 0026837175 scopus 로고
    • A CMOS four channel × 1 k time memory LSI with 1-ns/b resolution
    • Mar.
    • Y. Arai, T. Matsumura, and K. Endo, "A CMOS four channel × 1 k time memory LSI with 1-ns/b resolution," IEEE J. Solid-State Circuits, vol. 27, pp. 359-364, Mar. 1992.
    • (1992) IEEE J. Solid-State Circuits , vol.27 , pp. 359-364
    • Arai, Y.1    Matsumura, T.2    Endo, K.3
  • 3
    • 0030082886 scopus 로고    scopus 로고
    • A time digitizer CMOS gate-array with a 250 ps time resolution
    • Feb.
    • Y. Arai and M. Ikeno, "A time digitizer CMOS gate-array with a 250 ps time resolution," IEEE J. Solid-State Circuits, vol. 31, pp. 212-220, Feb. 1996.
    • (1996) IEEE J. Solid-State Circuits , vol.31 , pp. 212-220
    • Arai, Y.1    Ikeno, M.2
  • 4
    • 0029357418 scopus 로고
    • An integrated CMOS 0.15 ns digital timing generator for TDC's and clock distribution systems
    • Aug.
    • J. Christiansen, "An integrated CMOS 0.15 ns digital timing generator for TDC's and clock distribution systems," IEEE Trans. Nucl. Sci., vol. 42, pp. 753-757, Aug. 1995.
    • (1995) IEEE Trans. Nucl. Sci. , vol.42 , pp. 753-757
    • Christiansen, J.1
  • 6
    • 0030168854 scopus 로고    scopus 로고
    • A CMOS delay locked loop and sub-nanosecond time-to-digital converter chip
    • June
    • D. M. Santos, S. F. Dow, J. M. Flasck, and M. E. Levi, "A CMOS delay locked loop and sub-nanosecond time-to-digital converter chip," IEEE Trans. Nucl. Sci., vol. 43, pp. 1717-1719, June 1996.
    • (1996) IEEE Trans. Nucl. Sci. , vol.43 , pp. 1717-1719
    • Santos, D.M.1    Dow, S.F.2    Flasck, J.M.3    Levi, M.E.4
  • 7
    • 0026139594 scopus 로고
    • The MTD132 - A new sub-nanosecond multi-hit CMOS time-to-digital converter
    • Apr.
    • S. Kleinfelder, T. J. Majors, K. A. Blumer, W. Farr, and B. Manor, "The MTD132 - A new sub-nanosecond multi-hit CMOS time-to-digital converter," IEEE Trans. Nucl. Sci., vol. 38, pp. 97-101, Apr. 1991.
    • (1991) IEEE Trans. Nucl. Sci. , vol.38 , pp. 97-101
    • Kleinfelder, S.1    Majors, T.J.2    Blumer, K.A.3    Farr, W.4    Manor, B.5
  • 10
    • 33747770609 scopus 로고
    • Measurement precision of the new LeCroy MTD132
    • July
    • "Measurement precision of the new LeCroy MTD132," LeCroy Co. Application Note, AN-50, July 1991.
    • (1991) LeCroy Co. Application Note, AN-50


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.