Robust two-stage current-controlled oscillator in submicrometre CMOS

Electronics Letters

Volumn 35, Issue 21, 1999, Pages 1837-1839

  Djahanshahi, H ^a   Salama, C A T ^a  

^a UNIVERSITY OF TORONTO   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; DIFFERENTIAL AMPLIFIERS; NONLINEAR NETWORK ANALYSIS; NONLINEAR NETWORK SYNTHESIS; OSCILLATORS (ELECTRONIC); PHASE SHIFT; ROBUSTNESS (CONTROL SYSTEMS);

CURRENT-CONTROLLED RING OSCILLATORS; SOFTWARE PACKAGE HSPICE;

CMOS INTEGRATED CIRCUITS;

EID: 0033204330     PISSN: 00135194     EISSN: None     Source Type: Journal    
DOI: 10.1049/el:19991115     Document Type: Article

References (3)

1. RAZAVI, B.: 'Design of monolithic phase-locked loops and clock recovery circuits - a tutorial' in RAZAVI, B. (Ed.): 'Monolithic phase-locked loops and clock recovery circuits' (IEEE Press, New York, 1996)
2. RAZAVI, B.: 'A 2-GHz 1.6-mW phase-locked loop', IEEE J. Solid-State Circuits, 1997, 5, pp. 730-735
3. DJAHANSHAHI, H., and SALAMA, CAT.: 'Differential 0.35μm CMOS circuits for 622 M Hz/933 M Hz monolithic clock and data recovery applications'. Proc. IEEE Int. Symp. or Circuits and Systems, June 1999, Orlando, Vol. 2, pp. 93-96