SOI wafer flow process for stencil mask fabrication

Microelectronic Engineering

Volumn 46, Issue 1, 1999, Pages 473-476

  Butschke, J ^a   Ehrmann, A ^b   Hofflinger B ^a   Irmscher, M ^a   Kasmaier R ^b   Letzkus, F ^a   Loschner H ^c   Mathuni, J ^b   Reuter, C ^a   Schomburg, C ^a   Springer, R ^a  

^a Institut fur Mikroelektronik Stuttgart   (Germany)

^b SIEMENS AG   (Germany)

^c Ionen Mikrofabrikations Syst GmbH   (Austria)

Author keywords

[No Author keywords available]

Indexed keywords

SILICON ON INSULATOR TECHNOLOGY; SILICON WAFERS;

WAFER FLOW PROCESSES (WFP);

MASKS;

EID: 0033131644     PISSN: 01679317     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0167-9317(99)00043-X     Document Type: Article

References (7)

1. [1] H. Löschner, G. Gross, I. L. Berry, "Ion Projection Lithography", White Paper submitted to SEMATECH, Sept. 1997
2. [2] I. W. Rangelow et al., "PN-junction Based Wafer Flow Process for Stencil Mask Fabrication", EIPBN'98
3. [3] F. Shi, "Naßchemische Ätzprozesse z. Mikrostrukturierung des Siliziums für die Mikromechanik", Diss., Kassel, 1994
4. [4] M. Irmscher et al., "TSI Process at and below Quarter Micron Resolution and Pattern Transfer into Metal", EIPBN '97, 27-30 May 1997
5. [5] Patent IMS Chips
6. [6] J. R. Wasson et al., "Ion absorbing stencil mask coatings for ion beam lithography", J. Vac. Sci. Technol. B15, Nov/Dec 1997
7. [7] UBM GmbH, Ettlingen, Germany