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1
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0020781156
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1982.
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E. Lerarasmee, A.E. Ruehli, and A.L. Sangiovanni-Vincentelli,"The waveform relaxation method for time-domain analysis of large scale integrated circuits," IEEE Trans. Computer-Aided Design, vol. 1, no. 3, pp. 131-145, July 1982.
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A.E. Ruehli, and A.L. Sangiovanni-Vincentelli,"The Waveform Relaxation Method for Time-domain Analysis of Large Scale Integrated Circuits," IEEE Trans. Computer-Aided Design, Vol. 1, No. 3, Pp. 131-145, July
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Lerarasmee, E.1
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4
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0021566913
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507-514.
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J.F. Beetem, P. Debefve, W. Donath, H.Y. Hsieh, F. Odeh, A.E. Ruehli, J. White, and P.K. Wolff, Sr.,"A large scale MOSFET circuit analyzer based on waveform relaxation," in IEEE Int. Conf. on Computer Design, Oct. 1984, pp. 507-514.
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P. Debefve, W. Donath, H.Y. Hsieh, F. Odeh, A.E. Ruehli, J. White, and P.K. Wolff, Sr.,"A Large Scale MOSFET Circuit Analyzer Based on Waveform Relaxation," in IEEE Int. Conf. on Computer Design, Oct. 1984, Pp.
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Beetem, J.F.1
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5
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33747838617
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1987.
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T.J. Cockerill, H.Y. Hsieh, J. LeBlanc, D. Ostapko, A.E. Ruehli, and J.K. White, "Toggle: A circuit analyzer for MOSFET VLSI," CompEuro, 1987.
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H.Y. Hsieh, J. LeBlanc, D. Ostapko, A.E. Ruehli, and J.K. White, "Toggle: A Circuit Analyzer for MOSFET VLSI," CompEuro
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Cockerill, T.J.1
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9
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0022217361
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26-28.
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M.E. Mokari-Bolhassan, D. Smart, and T.N. Trick, "A new robust relaxation technique for VLSI circuit simulation," in IEEE Int. Conf. on Computer-Aided Design, Nov. 1985, pp. 26-28.
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D. Smart, and T.N. Trick, "A New Robust Relaxation Technique for VLSI Circuit Simulation," in IEEE Int. Conf. on Computer-Aided Design, Nov. 1985, Pp.
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Mokari-Bolhassan, M.E.1
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10
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0027091235
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149-153.
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W. John, W. Rissiek, and K.L. Paap, "Circuit partitioning for waveform relaxation," European Design Automation Conf., Feb. 1991, pp. 149-153.
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W. Rissiek, and K.L. Paap, "Circuit Partitioning for Waveform Relaxation," European Design Automation Conf., Feb. 1991, Pp.
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John, W.1
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11
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0026299743
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2276-2279.
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M. Nakano, Y. Mae, and I. Shirakawa, "A waveform relaxation method applicable to bipolar digital circuits," in IEEE Int. Symp. on Circuits and Systems, 1991, pp. 2276-2279.
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Y. Mae, and I. Shirakawa, "A Waveform Relaxation Method Applicable to Bipolar Digital Circuits," in IEEE Int. Symp. on Circuits and Systems, 1991, Pp.
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Nakano, M.1
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14
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33747823642
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69-72.
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A.E. Ruehli, G.D. Gristede, and C.A. Zukowski, "On partitioning and windowing for waveform relaxation," in Proc. of 7th Int. Conf. on Numerical Analysis of Semiconductor Devices and Integrated Circuits (NASECODE VII), Apr. 1991, pp. 69-72.
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G.D. Gristede, and C.A. Zukowski, "On Partitioning and Windowing for Waveform Relaxation," in Proc. of 7th Int. Conf. on Numerical Analysis of Semiconductor Devices and Integrated Circuits (NASECODE VII), Apr. 1991, Pp.
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Ruehli, A.E.1
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16
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0016519919
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1975.
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C.W. Ho, A. E Ruehli, and P.A. Brennan, "The modified nodal approach to network analysis," IEEE Trans. Circuits Syst., vol. CAS-22, pp. 504-509, June 1975.
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A. E Ruehli, and P.A. Brennan, "The Modified Nodal Approach to Network Analysis," IEEE Trans. Circuits Syst., Vol. CAS-22, Pp. 504-509, June
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Ho, C.W.1
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18
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0024702633
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1989.
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M.P. Desai and I.N. Hajj, "On the convergence of block relaxation methods for circuit simulation," IEEE Trans. Circuits Syst., vol. 36, no. 7, pp. 948-958, July 1989.
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And I.N. Hajj, "On the Convergence of Block Relaxation Methods for Circuit Simulation," IEEE Trans. Circuits Syst., Vol. 36, No. 7, Pp. 948-958, July
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Desai, M.P.1
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19
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0025561330
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170-173.
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C.A. Zukowski, G.D. Gristede, and A.E. Ruehli, "Measuring error propagation in waveform relaxation algorithms," in IEEE Int. Conf. on Computer-Aided Design, Nov. 1990, pp. 170-173.
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G.D. Gristede, and A.E. Ruehli, "Measuring Error Propagation in Waveform Relaxation Algorithms," in IEEE Int. Conf. on Computer-Aided Design, Nov. 1990, Pp.
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Zukowski, C.A.1
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