메뉴 건너뛰기




Volumn 35, Issue 4, 1999, Pages 263-264

Simple technique for opamp continuous-time 1V supply operation

Author keywords

[No Author keywords available]

Indexed keywords


EID: 0033075581     PISSN: 00135194     EISSN: None     Source Type: Journal    
DOI: 10.1049/el:19990208     Document Type: Article
Times cited : (34)

References (5)
  • 1
    • 0032094945 scopus 로고
    • Low voltage class AB buffers with quiescent current control
    • YOU, F., EMBABI, S.H.K., and SÁNCHEZ-SINENCIO, E.: 'Low voltage class AB buffers with quiescent current control', IEEE J. Solid State Circuits, 1993, SSC-33, (3), pp. 915-920
    • (1993) IEEE J. Solid State Circuits , vol.SSC-33 , Issue.3 , pp. 915-920
    • You, F.1    Embabi, S.H.K.2    Sánchez-Sinencio, E.3
  • 2
    • 0032120087 scopus 로고    scopus 로고
    • Active series switch for switched opamp circuits
    • BASCHIROTTO, A., CASTELLO, R., and MONTAGNA, G.P.: 'Active series switch for switched opamp circuits'. Electron. Lett., 1998, 34, (14), pp. 1365-1366
    • (1998) Electron. Lett. , vol.34 , Issue.14 , pp. 1365-1366
    • Baschirotto, A.1    Castello, R.2    Montagna, G.P.3
  • 3
    • 0031198225 scopus 로고    scopus 로고
    • 90OmV differential class AB OTA for switched opamp applications
    • PELUSO, V., VANCORNLAND, P., STEYAERT, M., and SANSEN, W.: '90OmV differential class AB OTA for switched opamp applications', Electron. Lett., 1997, 33, pp. 1455-1456
    • (1997) Electron. Lett. , vol.33 , pp. 1455-1456
    • Peluso, V.1    Vancornland, P.2    Steyaert, M.3    Sansen, W.4
  • 4
    • 0032117485 scopus 로고    scopus 로고
    • Designing 1V OP amps using standard digital CMOS technology
    • BLALOCK, B.J., ALLEN, P.E., and RINCÓN-MORA, G.A.: 'Designing 1V OP amps using standard digital CMOS technology', IEEE Trans., 1998, CASII-45, (7), pp. 769-780
    • (1998) IEEE Trans. , vol.CASII-45 , Issue.7 , pp. 769-780
    • Blalock, B.J.1    Allen, P.E.2    Rincón-Mora, G.A.3
  • 5
    • 0029404244 scopus 로고
    • Low voltage circuit building blocks using multiple input floating gate transistors
    • RAMÍREZ-ANGULO, J., CHOI, S.C., and GONZÁLEZ-ALTAMIRANO, G.: 'Low voltage circuit building blocks using multiple input floating gate transistors', IEEE Trans., 1995, CASI-42, (11), pp. 971-974
    • (1995) IEEE Trans. , vol.CASI-42 , Issue.11 , pp. 971-974
    • Ramírez-Angulo, J.1    Choi, S.C.2    González-Altamirano, G.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.