Strategy for power-efficient design of parallel systems

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volumn 7, Issue 2, 1999, Pages 258-265

  Danckaert, Koen ^b   Masselos, Konstantinos ^a,c   Catthoor, Francky ^a,d   De Man, Hugo J ^a,d   Goutis, Costas ^a,c  

^a IEEE

^b IMEC   (Belgium)

^c UNIVERSITY OF PATRAS   (Greece)

^d UNIVERSITY OF LEUVEN   (Belgium)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER HARDWARE; COMPUTER SOFTWARE; DATA STORAGE EQUIPMENT; IMAGE CODING; PARALLEL PROCESSING SYSTEMS; PULSE CODE MODULATION; VIDEO SIGNAL PROCESSING;

SYSTEM LEVEL STORAGE ORGANIZATIONS;

MICROPROCESSOR CHIPS;

EID: 0032689802     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/92.766753     Document Type: Article

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