A Dedicated Multi-Chip Programmable System for Cellular Neural Networks

Analog Integrated Circuits and Signal Processing

Volumn 18, Issue 2-3, 1999, Pages 277-288

  Salerno, Mario ^a   Sargeni, Fausto ^a   Bonaiuto, Vincenzo ^a  

^a UNIVERSITY OF ROME TOR VERGATA   (Italy)

Author keywords

Cellulan neural networks; Neural networks; VLSI

Indexed keywords

IMAGE PROCESSING; VLSI CIRCUITS;

MULTI-CHIP PROGRAMMABLE SYSTEMS;

CELLULAR NEURAL NETWORKS;

EID: 0032683251     PISSN: 09251030     EISSN: None     Source Type: Journal    
DOI: 10.1023/a:1008375725739     Document Type: Article

References (29)

1. L. O. Chua and L. Yang, "Cellular Neural Networks: Theory." IEEE Trans. Circuits and Systems 32, pp. 1257-1272, 1988.
2. L. O. Chua and L. Yang, "Cellular Neural Networks: Applications." IEEE Trans. Circuits and Systems 32, pp. 1273-1290, 1988.
3. L. O. Chua and T. Roska, "The CNN universal machine: an analogic array computer." IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing 40(3), pp. 163-173, 1993.
4. T. Roska and J. A. Nossek (Eds), "Special Issue on Cellular Neural Networks." IEEE Trans. on Circuits and Systems 40(3), 1993.
5. "Analogic CNN Program Library." Version 6.2, DNS-7-1995, Analogic and Neural Computing Laboratory, Computer and Automation Inst., Hungarian Academy of Sciences, 1995.
6. J. M. Cruz and L. O. Chua, "A CNN chip for Connected Component Detection." IEEE Trans. Circuits and Systems 38, pp. 812-817, 1991.
7. K. Halonen, V. Porra, T. Roska, and L. O. Chua, "Programmable analog VLSI CNN chip with local digital logic." Int. Journal of Circuit Theory and Applications 20(5), pp. 573-582, 1992.
8. M. Anguita, F. J. Pelajo, A. Prieto, and J. Ortega, "Analog CMOS implementation of a discrete time CNN with Programmable Cloning Templates." IEEE Trans. on Circuits and Systems 40(3), pp. 215-218, 1993.
9. P. Kinget and M. Steyaert, "A Programmable analog Cellular Neural Network CMOS chip for high speed image processing." IEEE Journal of Solid-State Circuits 30(3), pp. 235, 243, March 1995.
10. A. Paasio, A. Dawidziuk, K. Halonen, and V. Porra, "Digitally controllable weights in current mode Cellular Neural Networks." Proceedings of CNNA-94, pp. 73-77, 1994.
11. A. Paasio, A. Dawidziuk, K. Halonen, and V. Porra, "High speed 16 by 16 CNN chip." IEEE Int. Symp.on Circuit and System (ISCAS-96) Atlanta GE, pp. 519-522, 1996.
12. A. Paasio, A. Dawidziuk, K. Halonen, and V. Porra, "Minimum Size 0.5 Micron CMOS Programmable 48 by 48 CNN Test Chip." European Conference on Circuit Theory and Design (ECCTD'97) Budapest, pp. 154-156, 1997.
13. S. Espejo, R. Carmona, R. Dominguez-Castro, and A. Rodriguez-Vazquez, "CNN Universal Chip in CMOS technology." Int. Journal on Circuit Theory and Applications Special Issue on CNN, part I, 24, pp. 93-111, 1996.
14. A. Rodriguez-Vazquez, S. Espejo, R. Dominguez-Castro, J. Huertas, and E. Sanchez-Sinencio, "Current-mode techniques for the implementation of continuous and discrete-time Cellular Neural Networks." IEEE Trans. on Circuits and Systems-II 40, pp. 147-155, 1993.
15. F. Sargeni, "Digitally Programmable Transconductance Amplifier for CNN applications." Electronics Letters 30(11), pp. 870-872, 1994.
16. F. Sargeni and V. Bonaiuto, "High performance digitally programmable CNN chip with discrete templates." Proc. of CNNA-94 pp. 67-72.
17. M. Salerno, F. Sargeni, and V. Bonaiuto, "DPCNN: a modular chip for large CNN arrays." IEEE Int. Conf. on Circ. and Sys.(ISCAS-95) Seattle, WA USA, pp. 417-420, 1995.
18. F. Sargeni and V. Bonaiuto, "A fully digitally programmable CNN chip." IEEE Trans. on Circuits and Systems- II 42(11), pp. 741-745, 1995.
19. F. Sargeni and V. Bonaiuto, "A 3 x 3 digitally programmable CNN chip." Int. Journal of Circuit Theory and App. 24(3), pp. 369-379, 1996.
20. M. Salerno, F. Sargeni, and V. Bonaiuto, "A 9 x 9 multi chip CNN board for Cellular Neural Networks." Proc. of CNNA-96, 4th IEEE Int. Workshop on Cellular Neural Networks and their App Seville, Spain, pp. 261, 266, 1996.
21. M. Salerno, F. Sargeni, and V. Bonaiuto, "6 x 6DPCNN: a programmable mixed analog-digital chip for Cellular Neural Networks." Proc. of CNNA-96 4th IEEE Int. Workshop on Cellular Neural Networks and their App Seville, Spain, pp. 451, 456, 1996.
22. M. Salerno, F. Sargeni, and V. Bonaiuto, "A 6 x 6 cells interconnection-oriented programmable chip for CNN." to be appeared in Analog Integrated Circuits and Signal Processing.
23. Jose Pineda de Gyvez, E. Sanchez-Sincencio, and Gunhee Han, "Optimal Manufacturable CNN Array Size for Time Multiplexing Schemes." Proc. of CNNA-96, 4th IEEE Int. Workshop on Cellular Neural Networks and their App. Seville, Spain, pp. 387, 392, 1996.
24. T. Matsumoto, L. O. Chua, and H. Suzuki, "CNN cloning template: connected component detector." IEEE Transactions on Circuits and Systems 37(5), pp. 633-635, 1990.
25. H. Suzuki, T. Matsumoto, and L. O. Chua, "A CNN handwritten character recognizer." Intern. Journal of Circuit Theory and Applications 20(5), pp. 601-612, 1992.
26. T. Matsumoto, L. O. Chua, and R. Furukawa, "CNN cloning template: hole-filler." IEEE Transactions on Circuits and Systems 37(5), 635-638, 1990.
27. T. Matsumoto, L. O. Chua, and H. Suzuki, "CNN cloning template: shadow detector." IEEE Transactions on Circuits and Systems 37(8), 1070-1073, 1990.
28. A. Radvànyi, "Using Cellular Neural Network to "See" Random-Dot-Stereograms." Computer Analysis of Images and Patterns, Lecture Notes in Computer Science Springer Verlag, pp. 719, 1993.
29. P. L. Venetianer, F. Werblin, T. Roska, and L. O. Chua, "Analogic CNN algorithms for some image compression and restoration tasks." IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications 42(5), pp. 278-284, 1995.