Design and implementation of an RSFQ switching node for petaflops networks

IEEE Transactions on Applied Superconductivity

Volumn 9, Issue 2 PART 3, 1999, Pages 3557-3560

  Yorozut, Shinichi ^a,b   Zinoviev, Dmitry Yu ^a   Sazaklis, George ^a  

^a STONY BROOK UNIVERSITY   (United States)

^b Tnec Corporation   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER ARCHITECTURE; PACKET SWITCHING; SUPERCONDUCTING MATERIALS; SWITCHING NETWORKS;

HYBRID TECHNOLOGY MULTI THREADED ARCHITECTURE; MULTISTAGE PACKET SWITCHING NETWORK; PETAFLOPS NETWORKS;

DIGITAL CIRCUITS;

EID: 0032677564     PISSN: 10518223     EISSN: None     Source Type: Journal    
DOI: 10.1109/77.783798     Document Type: Article

References (6)

1. K. Likharev and V. Semenov, "RSFQ logic/memory family: a new Josephson junction technology for sub-teraherz clock frequency digital systems," Applied Superconductivity, vol. 1, pp. 3-28, Mar. 1991.
2. G. Gao, K. K. Likharev, P. C. Messina, and T. L. Sterling, "Hybrid technology multithreaded architecture," in Proc. Frontiers'96, (Annapolis, MD), pp. 98-105, 1996.
3. M. Dorojevets, P. Bunyk, D. Zinoviev, and K. Likharev, "Petaflops RSFQ system design." Report ETE-04 to ASC'98, unpublished, Sept. 1998.
4. L. Wittie, G. Sazaklis, D. Zinoviev, and K. Likharev, "CNET: Designing an RSFQ switching network for petaflops computing." Report EOD-03 to ASC'98, unpublished, Sept. 1998.
5. D. Zinoviev and M. Maezawa, "Application of credit-based flow control to RSFQ micropipelines." Report EDE-04 to ASC'98, unpublished, Sept. 1998.
6. "HYPRES design rules." Available from HYPRES, Inc., 175 Clearbrook Rd., Elmsford, NY, 10523.