Analogue BiCMOS squarer and its applications

Electronics Letters

Volumn 35, Issue 5, 1999, Pages 361-363

  Chang, Cheng Chieh ^a   Liu, Shen Iuan ^a   Lee, Jiin Long ^a  

^a NATIONAL TAIWAN UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

BANDWIDTH; BIPOLAR INTEGRATED CIRCUITS; ELECTRIC ATTENUATORS; ELECTRIC CURRENTS; ELECTRIC POTENTIAL; MOS DEVICES; MULTIPLYING CIRCUITS; SUMMING CIRCUITS;

ANALOG SIGNAL PROCESSING; SQUARER CIRCUIT; VECTOR SUMMATION CIRCUIT;

CMOS INTEGRATED CIRCUITS;

EID: 0032662965     PISSN: 00135194     EISSN: None     Source Type: Journal    
DOI: 10.1049/el:19990301     Document Type: Article

References (8)

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2. BULT, K., and WALLINGA, H.: 'A class of analog CMOS circuits based on the square-law characteristics of an MOS transistor in saturation', IEEE J. Solid-State Circuits, 1987, SC-22, pp. 357-365
3. PENA-FINOL, J., and CONNELLY, J.A.: 'A MOS four-quadrant analog multiplier using the quarter-square technique', IEEE J. Solid-State Circuits, 1987, SC-22, pp. 1064-1073
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8. LAKER, K.R., and SANSEN, W.M.C.: 'Design of analog integrated circuits and systems' (McGraw-Hill, 1994), p. 55